B.Tech (EC), NIT, Allahabad
Telecommunications Team Mentor, he brings in 8+ years of industry experience in various fields like Telecom. Wireless communication, Test and Measurement and Bio-Medical Signal Processing.
Prior to Logic Fruit, Vivek has worked as a Scientist in DRDO. Vivek has worked on FPGA design in BBIC simulator for RFIC Test, DigRF v4_v1.0 and DigRF_v1.1, DigRF Protocol Engine, RTL design of LDPC decoder for Wi-Fi (IEEE 802.11ac), RTL design of STM16, STM64 Framer/De-framer.
Over so many years, he has developed deep understanding of DigRF v4: Ver. 1 & 2, STM 1/4/16/64, OTN Ver. 1 & 2, etc.