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Panoramic video stabilization and jitter correction Board

The main task of the EVIS Unit is to generate high quality extended view of a scene in real-time, automatic change detection modules, video archival and replay for Optronic Surveillance Sight (OSS).The panorama generation unit receives Thermal Imagersensor or a CCD sensor at 25 fps. The camera payload is mounted on a rotating Gimbal head. The scanning Gimbal head can rotate in any defined sector over n x 360 degrees with a defined rate with selectable scanning patterns.

The automatic change detection module detects real-time automatic change detection in the generated extended view. The module reliably depicts the changes in the scene in real-time as the data is being collected.The generated panorama is sent to an MFD over digital or over analog PAL interface. The MFD display resolution is 1024×768 pixels.Generated Extended view of the scene is stored in a standard format in either JPEG or H.264 formats. Final Extended View is displayed on an MFD.

Features

  • FPGA/DSP based Embedded Hardware High performance platform
  • Designed for 24 X 7 Operation
  • Slim-line Rugged Design
  • Adequate Memories for processing (≥128MB)/Flash Memory for compressed video archival (≥32GB)
  • Power Source: 28V DC @ 2A
  • Operating temperature: -20°C to 85°C
  • 8 illuminated Push Button Switches for user additional control inputs
  • Screen control, Video Selection keys, and Power On/Off switch
  • Status Indicators
  • 14 pin JTAG Connector for Programming

Interfaces

  • PAL-B (input through Mini BNC connector for Thermal/CCD)
  • SD-SDI input through Mini BNC connector for Thermal (on cutout)
  • Input power of 28V @ 2A through Nicomatic Connector R/A 6 pins (on cutout)
  • 1 JTAG connector for FPGA (bit-file update)/ DSP (firmware update) (on cutout)
  • PAL output from FPGA for developmental purpose through Mini BNC connector
  • HD-SDI output for displaying Panorama from LCD0 output of DSP through Mini BNC (on cutout).
  • PAL output for displayingPanorama from LCD2 output of DSP through Mini BNC (on cutout)
  • One RS232 interface on DB9connector from DSP(on cutout)
  • One RS232 interface onNicomatic connector
  • One CAN Interface on DB9connector (on cutout)
  • Reset Switch: Push Button SPDT Switch (on cutout)
  • Power on/off switch (on cutout)
  • 6 LEDs connected 2 each with both FPGA and DSP
  • Dip Switch 8 position (on cutout)
  • USB connector with DSP (on cutout)

Mechanical Specifications

Size of unit: 210 x 190 mm x 50 mm

Hardware Specifications

Component Purpose
Kintex-7 FPGA Frame Registration and Change Detection
Kintex-7 FPGA Pre-processing Techniques
DSP Processor Frame Stitching, Tiles Formation, Target Overlay, Video Archival and Replay, GUI, and MFD Interaction
Video Decoder Analog Input
Video Encoder Analog Output from DSP
Video Encoder Analog Output from FPGA
Serializer Chip Digital Output
SRAMs Memories (9 with 1st FPGA and 5 with 2nd FPGA)
DDR3 Memory High speed Memories
SPI flash Configuration Flash
Nand Flash For Booting Purpose
eMMC For Video Archival Purpose
1 uSD Card For Debugging Purpose
RS422 transceiver MFD Serial Command Interface
RS232 transceiver Internal Debugging Purpose
RS232 transceiver Debug Output Port
CAN transceiver

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