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Job Description:

You will develop RTL code to implement FPGA-based digital designs, working from specification through to system integration. Projects will range from Mid to multi-million gates. Most projects implement a combination of control logic (bus interfaces and state machines), Digital Signal Processing and Embedded Processors.

Responsibilities include:

  • Understand the customer requirements and product definition with R/D team.
  • Write functional specifications.
  • Functional partitioning, block diagram and detailed design spec.
  • RTL coding of the design in VHDL or Verilog.
  • Develop test bench and verify at the block level.
  • Functional and gate level simulation and assertions.
  • Post synthesis simulation.
  • Design Synthesis, mapping to targeted FPGA device, and timing closure.
  • FPGA debugging and HW/SW integration.

Requirements:

  • 2-4 years of experience, including successful completion of FPGA based projects.
  • Experience targeting Xilinx and/or Altera FPGAs required.
  • Familiarity withsoftware tools like Modelsim, Questasim, Xilinx ISE, Planahead, Altera Quartus etc. is required.
  • Familiarity with debugging tools like Chipscope, Signal Tap, Logic analyzer, Scope, FPGA editor.
  • Coding experience in VHDL and/or Verilog is must.
  • Implementation of designs with multiple clock domains is required.
  • Thorough understanding of appropriate coding styles for FPGAs, and trade-offs for density and speed.
  • Experience in RTL implementation of DSP algorithms will be appreciated.
  • Experience in interfaces like PCIe-Genx, AMBA-AXI, SRAM, DDRx, USB, UART, I2C, SPI, ADC, DAC, Ethernet will be appreciated.

Minimum Qualification:

B.Tech/B.E. – Electronics/Telecommunication

Job Description:

As Physical Design Engineer, you willspecify, design, and implement analog, digital, andRF integrated circuits. You will have the opportunity to work in exciting areas like imaging, audio, video, interface, and much more. You will be working with highly motivated teams to implement complex digital IC designs. You will be driving state of the art EDA tools on IC design to achieve best performance.

Responsibilities include:

  • Perform physical implementation steps including synthesis, floorplanning, place and route, power/clock distribution, congestion analysis, timing closure, CDC analysis and formal verification.
  • Work with logic designers to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs for physical design closure.
  • Develop physical design methodologies and automation scripts for various implementation steps.

Requirements:

  • Candidate should have minimum of 4+ years of Physical Design Expertise
  • Should be familiar with the Synopsys toolsets like ICC/ICC2, STA, STARRC, ICV
  • Sound timing concepts is a must along with fair understanding of the Physical Verification (DRC/LVS/ANT)
  • He/She should have a good scripting knowledge in TCL, Perl
  • It is expected that candidate works independently with less supervision.

Minimum Qualification:

B.Tech/B.E. – Electronics/Telecommunication

Job Description:

As Senior Engineer-Wireless, you will be primarily responsible for development of any S/W and driver for 802.11 wireless modules and SoC under Linux and Windows.

Responsibilities include:

  • Understanding customer requirement, doing literature survey, preparing investigation document and design documents.
  • Defining RF Hardware Specification for RF Hardware Team.
  • Independently handle given tasks or software modules.
  • Helping HW team in board and peripheral bring up.
  • Coordinating with QA team.

Requirements:

  • Good Knowledge and understanding of 802.11ac standard & wireless communications systems.
  • Good Understanding of wireless Hardware and wireless terminology.
  • Mandatory working experience with Atheros/Qualcomm/Broadcomm/ Quantennawifi modules and SoC’s.
  • Experience on QCA9990/QCA9992, IPQ4018/19/28/29 is highly preferred.
  • Mandatory knowledge of wireless driver architecture and API’s under Linux; under Windows is optional.
  • Mandatory hands on experience in developing/porting and optimizing WIFI drivers.
  • In depth understanding of driver configuration parameters for high throughput, improving BER and reducing FLR.
  • Knowledge of WiFi interface configuration tools and utilities under Linux.
  • Hands on experience in any WiFi testing tools & s/w is preferred.
  • Driver level implementation/configuration knowledge of ACM, QoS, Burst Synchronization, TDMA etc. is preferred.
  • Knowledge of n/w synchronization using SyncE/PTP and TDD-FDD modulation techniques is preferred.
  • High proficiency in C and C++ with good coding practices as per MISRA C.
  • Development experience under Linux and Windows.
  • Good skill in personal communication; oral and written

 Qualifications Required

  • Tech/M.Tech/MSc with Electronics/Computers/IT Engineering.

Job Description:

As Verification Engineer, you will work with Design Engineers in verification and validation of circuit designs and develop design standards and guidelines to ensure quality and performance.

Responsibilities include:

  • Perform layout, logical, design, feasibility, and electrical verification of circuit components.
  • Participate in design reviews and recommend improvements.
  • Perform failure analysis and suggest corrective actions.
  • Work with management to coordinate and execute projects within allotted timelines and budget.
  • Determine technology requirements, dependencies and deliverables based on project specifications.
  • Prepare design verification plan based on design specifications.
  • Plan and schedule assigned projects for timely completion.
  • Utilize latest techniques, tools and technologies for design verification activities.
  • Maintain design verification environment and track and close design bugs.
  • Develop design verification methodologies and implement standard debug flows.

Requirements:

  • 3+ years of industry experience in ASIC front-end IP/SoC verification and Validation.
  • Good Knowledge and understanding of 802.11ac standard & wireless communications systems.
  • Exposure to Post-silicon bring-up and Validation.
  • Experience in writing test cases in C, System Verilog and UVM.
  • Good Knowledge in C, Verilog and system Verilog languages, UVM methodology and also PERL,TCL scripting language.
  • Development of Verification IP using System Verilog and UVM.
  • Hands on Experience in ATE Functional patterns development and Verification on Vtest.
  • Must have handled at least one complete verification cycle(UVM,OVM,VMM).
  • Must be willing to travel to customer site on project requirement.
  • Good skill in personal communication; oral and written

 Qualifications Required

  • Tech/M.TechElectronics/IT Engineering.

Job Description:

As Physical Design Engineer, you willspecify, design, and implement analog, digital, andRF integrated circuits. You will have the opportunity to work in exciting areas like imaging, audio, video, interface, and much more. You will be working with highly motivated teams to implement complex digital IC designs. You will be driving state of the art EDA tools on IC design to achieve best performance.

Responsibilities include:

  • Perform physical implementation steps including synthesis, floorplanning, place and route, power/clock distribution, congestion analysis, timing closure, CDC analysis and formal verification.
  • Work with logic designers to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs for physical design closure.
  • Develop physical design methodologies and automation scripts for various implementation steps.

Requirements:

  • Candidate should have minimum of 4+ years of Physical Design Expertise
  • Should be familiar with the Synopsys toolsets like ICC/ICC2, STA, STARRC, ICV
  • Sound timing concepts is a must along with fair understanding of the Physical Verification (DRC/LVS/ANT)
  • He/She should have a good scripting knowledge in TCL, Perl
  • It is expected that candidate works independently with less supervision.

Minimum Qualification:

B.Tech/B.E. – Electronics/Telecommunication

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