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Video Acquisition System
Video Acquisition System The system is targeted to enhance the quality of the videos from the thermal imagers system and equip the imagers with the
Bi-lateral Filter
Bi-lateral Filter Latest research in the field of image processing has shown that the bilateral filter is one of the most popular filters designed for
Nor Flash Controller
Nor Flash Controller The NOR flash controller performs flash programming through SPI interface. Mainly, four operations such as read, write and erase and reset are
SDI Controller
SDI Controller SDI includes low resolution SD-SDI (SMPTE 259) and HD-SDI (SMPTE 294). SD-SDI is used to transmit low resolution PAL compatible video 720 *
SPI Master/Slave Controller
SPI Master/Slave Controller Support for both SPI Master and Slave. Multi Master Support. 8 Slave Select Lines. In Master Mode – bit rate generated is
High Speed Transceivers (GTX, GXB)
High Speed Transceivers (GTX, GXB) running upto 12 Gbps High speed transceivers (GTX) is one of the key expertise when working with high-speed FPGA design.
AXI-Full and AXI-Lite Interfaces
AXI Lite Interface AXI Lite Interface has Master components, Interconnect, and Slave Components . User Logic connected to AXI-Lite Masters and AXI-Lite Slaves, and AXI-Lite
AWGN Channel Simulator IP
AWGN Channel Simulator IP Based on Box Muller Algorithm Tail Accuracy of 6.6σ Effective Period Length of 2255 Flat Noise Spectrum Supports all FPGA devices
Turbo Product Code [TPC]
Turbo Product Code [TPC] The BCH based TPC decoder is used for Forward Error Correction (FEC) in systems where transmitted data is subjected to errors
OTN Framer and De-framer
OTN Framer and De-framer To meet the increasing demand for increased bandwidth using optical fiber links, and to support 2.5 Gb, 10 Gb and 40
